Minimal Working Example: ```vhdl library ieee; use ieee.std_logic_1164.all \``` Remove the \ from the code above (I couldn’t write the last line without it). It seems there’s no implementation of highlighting VHDL code in Typst, how can I do something to add this functionality? Thanks.

To elaborate on @gezepi ’s answer specifically for VHDL: Typst currently uses the definitions from the two-face crate which inherits definitions from bat . The VHDL language was recently added in bat but two-face is still using an older bat version. I guess eventually the VHDL syntax will trickle dow…

How to highlight VHDL code blocks in Typst?

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gezepi October 9, 2025, 1:31pm 2

@Andrew’s answer here gives a good breakdown of adding syntax highlighting:

The “hard part” is finding or creating a sublime-syntax file for VHDL.